Methods of forming magnetic memory cells and semiconductor devices

ABSTRACT

A magnetic cell includes a free region between an intermediate oxide region (e.g., a tunnel barrier) and a secondary oxide region. Both oxide regions may be configured to induce magnetic anisotropy (“MA”) with the free region, enhancing the MA strength of the free region. A getter material proximate to the secondary oxide region is formulated and configured to remove oxygen from the secondary oxide region, reducing an oxygen concentration and an electrical resistance of the secondary oxide region. Thus, the secondary oxide region contributes only minimally to the electrical resistance of the cell core. Embodiments of the present disclosure therefore enable a high effective magnetoresistance, low resistance area product, and low programming voltage along with the enhanced MA strength. Methods of fabrication, memory arrays, memory systems, and electronic systems are also disclosed.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a divisional of U.S. patent application Ser. No. 14/026,627, filed Sep. 13, 2013, the disclosure of which is hereby incorporated in its entirety herein by this reference.

TECHNICAL FIELD

The present disclosure, in various embodiments, relates generally to the field of memory device design and fabrication. More particularly, this disclosure relates to design and fabrication of memory cells characterized as spin torque transfer magnetic random access memory (STT-MRAM) cells.

BACKGROUND

Magnetic Random Access Memory (MRAM) is a non-volatile computer memory technology based on magnetoresistance. One type of MRAM cell is a spin torque transfer MRAM (STT-MRAM) cell, which includes a magnetic cell core supported by a substrate. The magnetic cell core includes at least two magnetic regions, for example, a “fixed region” and a “free region,” with a non-magnetic region (e.g., an oxide region configured as a tunnel barrier region) between. The free regions and fixed regions may exhibit magnetic orientations that are either horizontally oriented (“in-plane”) or perpendicularly oriented (“out-of-plane”) with the width of the regions. The fixed region includes a magnetic material that has a substantially fixed (e.g., a non-switchable) magnetic orientation. The free region, on the other hand, includes a magnetic material that has a magnetic orientation that may be switched, during operation of the cell, between a “parallel” configuration and an “anti-parallel” configuration. In the parallel configuration, the magnetic orientations of the fixed region and the free region are directed in the same direction (e.g., north and north, east and east, south and south, or west and west, respectively). In the “anti-parallel” configuration the magnetic orientations of the fixed region and the free region are directed in opposite directions (e.g., north and south, east and west, south and north, or west and east, respectively). In the parallel configuration, the STT-MRAM cell exhibits a lower electrical resistance across the magnetoresistive elements (e.g., the fixed region and free region). This state of low electrical resistance may be defined as a “0” logic state of the MRAM cell. In the anti-parallel configuration, the STT-MRAM cell exhibits a higher electrical resistance across the magnetoresistive elements. This state of high electrical resistance may be defined as a “1” logic state of the STT-MRAM cell.

Switching of the magnetic orientation of the free region may be accomplished by passing a programming current through the magnetic cell core and the fixed and free regions therein. The fixed region polarizes the electron spin of the programming current, and torque is created as the spin-polarized current passes through the core. The spin-polarized electron current exerts the torque on the free region. When the torque of the spin-polarized electron current passing through the core is greater than a critical switching current density (J_(c)) of the free region, the direction of the magnetic orientation of the free region is switched. Thus, the programming current can be used to alter the electrical resistance across the magnetic regions. The resulting high or low electrical resistance states across the magnetoresistive elements enable the write and read operations of the MRAM cell. After switching the magnetic orientation of the free region to achieve the one of the parallel configuration and the anti-parallel configuration associated with a desired logic state, the magnetic orientation of the free region is usually desired to be maintained, during a “storage” stage, until the MRAM cell is to be rewritten to a different configuration (i.e., to a different logic state).

Some STT-MRAM cells include, in addition to the oxide region (the “intermediate oxide region”) between the free region and the fixed region, another oxide region. The free region may be between the intermediate oxide region and the another oxide region. The exposure of the free region to two oxide regions may increase the free region's magnetic anisotropy (“MA”) strength. For example, the oxide regions may be configured to induce surface/interfacial MA with neighboring material of, e.g., the free region. MA is an indication of the directional dependence of a magnetic material's magnetic properties. Therefore, the MA is also an indication of the strength of the material's magnetic orientation and of its resistance to alteration of the magnetic orientation. A magnetic material exhibiting a magnetic orientation with a high MA strength may be less prone to alteration of its magnetic orientation than a magnetic material exhibiting a magnetic orientation with a lower MA strength. Therefore, a free region with a high MA strength may be more stable during storage than a free region with a low MA strength.

While the dual oxide regions may increase the MA strength of the free region, compared to a free region adjacent to only one oxide region (i.e., the intermediate oxide region), the added amount of oxide material in the magnetic cell core may increase the electrical resistance (e.g., the series resistance) of the core, which lowers the effective magnetoresistance (e.g., tunnel magnetoresistance) of the cell, compared to a cell core comprising only one oxide region (i.e., the intermediate oxide region). The increased electrical resistance also increases the resistance-area (“RA”) of the cell and may increase the voltage needed to switch the magnetic orientation of the free region during programming. The decreased effective magnetoresistance may degrade performance of the cell, as may the increased RA and programming voltage. Accordingly, forming STT-MRAM cells to have dual oxide regions around the free region, for high MA strength, without degrading other properties, such as magnetoresistance (e.g., tunnel magnetoresistance), RA, and programming voltage, has presented challenges.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional, elevational, schematic illustration of a magnetic cell structure according to an embodiment of the present disclosure, wherein a getter region is adjacent to a base oxide region.

FIG. 1A is an enlarged view of box AB of FIG. 1, according to an embodiment of the present disclosure in which a free region and a fixed region of the magnetic cell structure of FIG. 1 exhibit perpendicular magnetic orientations.

FIG. 1B is an enlarged view of box AB of FIG. 1, according to an embodiment of the present disclosure in which a free region and a fixed region of the magnetic cell structure of FIG. 1 exhibit horizontal magnetic orientations.

FIG. 2 is a cross-sectional, elevational, schematic illustration of a magnetic cell structure according to an embodiment of the present disclosure, wherein a getter region is within a base oxide region.

FIG. 3 is a partial, cross-sectional, elevational, schematic illustration of a magnetic cell structure during a stage of processing, prior to transfer of oxygen from an oxide region to a proximate getter region.

FIG. 4 is a partial, cross-sectional, elevational, schematic illustration of a magnetic cell structure during a stage of processing following that of FIG. 3 and following transfer of oxygen from the oxide region to the proximate getter region.

FIG. 5 is a cross-sectional, elevational, schematic illustration of a magnetic cell structure according to an embodiment of the present disclosure, wherein a getter region is adjacent and above a cap oxide region that is above a free region.

FIG. 6 is a partial, cross-sectional, elevational, schematic illustration of a magnetic cell structure according to an embodiment of the present disclosure, wherein a getter region is indirectly adjacent to a base oxide region.

FIG. 7 is a partial, cross-sectional, elevational, schematic illustration of a magnetic cell structure according to an embodiment of the present disclosure, wherein a getter region laterally surrounds a base oxide region.

FIG. 8 is a plan view of the structure of FIG. 7 taken along section line 8-8.

FIG. 9 is a schematic diagram of an STT-MRAM system including a memory cell having a magnetic cell structure according to an embodiment of the present disclosure.

FIG. 10 is a simplified block diagram of a semiconductor device structure including memory cells having a magnetic cell structure according to an embodiment of the present disclosure.

FIG. 11 is a simplified block diagram of a system implemented according to one or more embodiments of the present disclosure.

DETAILED DESCRIPTION

Memory cells, methods of forming memory cells, semiconductor devices, memory systems, and electronic systems are disclosed. The memory cells include a magnetic region (e.g., a free region), formed from a magnetic material, between two oxide regions, both of which may be magnetic anisotropy (“MA”)-inducing regions. One of the oxide regions, e.g., positioned between the free region and another magnetic region (e.g., a fixed region) and referred to herein as the “intermediate oxide region,” may be configured to function as a tunnel barrier of the memory cell. The other oxide region, referred to herein as the “secondary oxide region,” may not be configured to function as a tunnel barrier. A getter material is proximate to the secondary oxide region and is formulated to remove oxygen from the secondary oxide region, reducing the electrical resistance of the secondary oxide region and, thus, avoiding substantial lowering of the effective magnetoresistance of the memory cell. The electrical resistance of the secondary oxide region may be less than about 50% (e.g., between about 1% and about 20%) of the electrical resistance of the intermediate oxide region. In some embodiments, the secondary oxide region may become electrically conductive as a result of the removal of oxygen by the getter material. The overall electrical resistance of the STT-MRAM cell may, therefore, be decreased compared to an STT-MRAM cell lacking the getter material proximate the secondary oxide region. Further, the decreased electrical resistance avoids degradation to the magnetoresistance of the cell; thus, the STT-MRAM cell with getter material proximate the secondary oxide region may have a higher effective magnetoresistance compared to an STT-MRAM cell lacking such a getter material region. Nonetheless, the two oxide regions of the getter-including STT-MRAM cell may still induce MA with the free region. Therefore, the MA strength may not be degraded, while the electrical resistance is decreased to enable a maximum tunneling magnetoresistance, a low resistance area (“RA”) product, and use of a low programming voltage.

As used herein, the term “substrate” means and includes a base material or other construction upon which components, such as those within memory cells, are formed. The substrate may be a semiconductor substrate, a base semiconductor material on a supporting structure, a metal electrode, or a semiconductor substrate having one or more materials, structures, or regions formed thereon. The substrate may be a conventional silicon substrate or other bulk substrate including a semiconductive material. As used herein, the term “bulk substrate” means and includes not only silicon wafers, but also silicon-on-insulator (“SOT”) substrates, such as silicon-on-sapphire (“SOS”) substrates or silicon-on-glass (“SOG”) substrates, epitaxial layers of silicon on a base semiconductor foundation, or other semiconductor or optoelectronic materials, such as silicon-germanium (Si_(1-x)Ge_(x), where x is, for example, a mole fraction between 0.2 and 0.8), germanium (Ge), gallium arsenide (GaAs), gallium nitride (GaN), or indium phosphide (InP), among others. Furthermore, when reference is made to a “substrate” in the following description, previous process stages may have been utilized to form materials, regions, or junctions in the base semiconductor structure or foundation.

As used herein, the term “STT-MRAM cell” means and includes a magnetic cell structure that includes a magnetic cell core including a nonmagnetic region disposed between a free region and a fixed region. The STT-MRAM cell may be configured in a magnetic tunnel junction (“MTJ”) configuration, in which the nonmagnetic region comprises an electrically insulative (e.g., dielectric) material, such as an oxide. Such an electrically-insulative, oxide, nonmagnetic region, disposed between a free region and a fixed region, is referred to herein as an “intermediate oxide region.”

As used herein, the term “magnetic cell core” means and includes a memory cell structure comprising the free region and the fixed region and through which, during use and operation of the memory cell, current may be passed (i.e., flowed) to effect a parallel or anti-parallel configuration of the magnetic orientations of the free region and the fixed region.

As used herein, the term “magnetic region” means a region that exhibits magnetism. A magnetic region includes a magnetic material and may also include one or more non-magnetic materials.

As used herein, the term “magnetic material” means and includes ferromagnetic materials, ferrimagnetic materials, antiferromagnetic, and paramagnetic materials.

As used herein, the term “CoFeB material” means and includes a material comprising cobalt (Co), iron (Fe), and boron (B) (e.g., Co_(x)Fe_(y)B_(z), wherein x=10 to 80, y=10 to 80, and z=0 to 50). A CoFeB material may or may not exhibit magnetism, depending on its configuration (e.g., its thickness).

As used herein, the term “fixed region” means and includes a magnetic region within the STT-MRAM cell that includes a magnetic material and that has a fixed magnetic orientation during use and operation of the STT-MRAM cell in that a current or applied field effecting a change in the magnetization direction of one magnetic region, e.g., the free region, of the cell core may not effect a change in the magnetization direction of the fixed region. The fixed region may include one or more magnetic materials and, optionally, one or more non-magnetic materials. For example, the fixed region may be configured as a synthetic antiferromagnet (SAF) including a sub-region of ruthenium (Ru) adjoined by magnetic sub-regions. Each of the magnetic sub-regions may include one or more materials and one or more regions therein. As another example, the fixed region may be configured as a single, homogeneous magnetic material. Accordingly, the fixed region may have uniform magnetization, or sub-regions of differing magnetization that, overall, effect the fixed region having a fixed magnetic orientation during use and operation of the STT-MRAM cell.

As used herein, the term “free region” means and includes a magnetic region within the STT-MRAM cell that includes a magnetic material and that has a switchable magnetic orientation during use and operation of the STT-MRAM cell. The magnetic orientation may be switched between a parallel configuration and an anti-parallel configuration by the application of a current or applied field.

As used herein, “switching” means and includes a stage of use and operation of the memory cell during which programming current is passed through the magnetic cell core of the STT-MRAM cell to effect a parallel or anti-parallel configuration of the magnetic orientations of the free region and the fixed region.

As used herein, “storage” means and includes a stage of use and operation of the memory cell during which programming current is not passed through the magnetic cell core of the STT-MRAM cell and in which the parallel or anti-parallel configuration of the magnetic orientations of the free region and the fixed region is not purposefully altered.

As used herein, the term “vertical” means and includes a direction that is perpendicular to the width and length of the respective region. “Vertical” may also mean and include a direction that is perpendicular to a primary surface of the substrate on which the STT-MRAM cell is located.

As used herein, the term “horizontal” means and includes a direction that is parallel to at least one of the width and length of the respective region. “Horizontal” may also mean and include a direction that is parallel to a primary surface of the substrate on which the STT-MRAM cell is located.

As used herein, the term “sub-region,” means and includes a region included in another region. Thus, one magnetic region may include one or more magnetic sub-regions, i.e., sub-regions of magnetic material, as well as non-magnetic sub-regions, i.e., sub-regions of non-magnetic material.

As used herein, the term “between” is a spatially relative term used to describe the relative disposition of one material, region, or sub-region relative to at least two other materials, regions, or sub-regions. The term “between” can encompass both a disposition of one material, region, or sub-region directly adjacent to the other materials, regions, or sub-regions and a disposition of one material, region, or sub-region indirectly adjacent to the other materials, regions, or sub-regions.

As used herein, the term “proximate to” is a spatially relative term used to describe disposition of one material, region, or sub-region near to another material, region, or sub-region. The term “proximate” includes dispositions of indirectly adjacent to, directly adjacent to, and internal to.

As used herein, reference to an element as being “on” or “over” another element means and includes the element being directly on top of, adjacent to, underneath, or in direct contact with the other element. It also includes the element being indirectly on top of, adjacent to, underneath, or near the other element, with other elements present therebetween. In contrast, when an element is referred to as being “directly on” or “directly adjacent to” another element, there are no intervening elements present.

As used herein, other spatially relative terms, such as “beneath,” “below,” “lower,” “bottom,” “above,” “upper,” “top,” “front,” “rear,” “left,” “right,” and the like, may be used for ease of description to describe one element's or feature's relationship to another element(s) or feature(s) as illustrated in the figures. Unless otherwise specified, the spatially relative terms are intended to encompass different orientations of the materials in addition to the orientation as depicted in the figures. For example, if materials in the figures are inverted, elements described as “below” or “beneath” or “under” or “on bottom of” other elements or features would then be oriented “above” or “on top of” the other elements or features. Thus, the term “below” can encompass both an orientation of above and below, depending on the context in which the term is used, which will be evident to one of ordinary skill in the art. The materials may be otherwise oriented (rotated 90 degrees, inverted, etc.) and the spatially relative descriptors used herein interpreted accordingly.

As used herein, the terms “comprises,” “comprising,” “includes,” and/or “including” specify the presence of stated features, regions, integers, stages, operations, elements, materials, components, and/or groups, but do not preclude the presence or addition of one or more other features, regions, integers, stages, operations, elements, materials, components, and/or groups thereof.

As used herein, “and/or” includes any and all combinations of one or more of the associated listed items.

As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.

The illustrations presented herein are not meant to be actual views of any particular component, structure, device, or system, but are merely idealized representations that are employed to describe embodiments of the present disclosure.

Embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations. Accordingly, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments described herein are not to be construed as limited to the particular shapes or regions as illustrated but may include deviations in shapes that result, for example, from manufacturing techniques. For example, a region illustrated or described as box-shaped may have rough and/or nonlinear features. Moreover, sharp angles that are illustrated may be rounded. Thus, the materials, features, and regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a material, feature, or region and do not limit the scope of the present claims.

The following description provides specific details, such as material types and processing conditions, in order to provide a thorough description of embodiments of the disclosed devices and methods. However, a person of ordinary skill in the art will understand that the embodiments of the devices and methods may be practiced without employing these specific details. Indeed, the embodiments of the devices and methods may be practiced in conjunction with conventional semiconductor fabrication techniques employed in the industry.

The fabrication processes described herein do not form a complete process flow for processing semiconductor device structures. The remainder of the process flow is known to those of ordinary skill in the art. Accordingly, only the methods and semiconductor device structures necessary to understand embodiments of the present devices and methods are described herein.

Unless the context indicates otherwise, the materials described herein may be formed by any suitable technique including, but not limited to, spin coating, blanket coating, chemical vapor deposition (“CVD”), atomic layer deposition (“ALD”), plasma enhanced ALD, physical vapor deposition (“PVD”), or epitaxial growth. Depending on the specific material to be formed, the technique for depositing or growing the material may be selected by a person of ordinary skill in the art.

Unless the context indicates otherwise, the removal of materials described herein may be accomplished by any suitable technique including, but not limited to, etching, ion milling, abrasive planarization, or other known methods.

Reference will now be made to the drawings, where like numerals refer to like components throughout. The drawings are not necessarily drawn to scale.

A memory cell is disclosed. The memory cell includes a magnetic cell core that includes a free region located between two oxide regions, including an intermediate oxide region and a secondary oxide region. Both regions may be configured to induce MA (magnetic anisotropy) with the free region. The intermediate oxide region may also be configured to function as a tunnel barrier. A getter material is proximate to the secondary oxide region. The getter material has a chemical affinity for oxygen that is greater than or about equal to the chemical affinity for oxygen of the oxide material of the secondary oxide region. For example, the getter material may be formed of a metal for which the heat of formation of a metal oxide from the metal is lower than (e.g., more negative than) the heat of formation of the oxide of the secondary oxide region. Accordingly, the getter material is formulated to remove oxygen from the secondary oxide region, reducing the concentration of oxygen within the secondary oxide region and, therefore, reducing the electrical resistance of the secondary oxide region. The reduction in electrical resistance enables a higher magnetoresistance, a lower RA (resistance area) product, and a lower programming voltage, compared to an STT-MRAM cell without the getter matter. Therefore, the STT-MRAM cell may be formed to include two MA-inducing regions, providing high MA strength, without degrading tunneling magnetoresistance, RA product, or the programming voltage.

FIG. 1 illustrates an embodiment of a magnetic cell structure 100 according to the present disclosure. The magnetic cell structure 100 includes a magnetic cell core 101 over a substrate 102. The magnetic cell core 101 may be disposed between an upper electrode 104 above and a lower electrode 105 below. A conductive material, from which either or both of the upper electrode 104 and the lower electrode 105 are formed, may comprise, consist essentially of, or consist of, for example and without limitation, a metal (e.g., copper, tungsten, titanium, tantalum), a metal alloy, or a combination thereof.

The magnetic cell core 101 includes at least two magnetic regions, for example, a “fixed region” 110 and a “free region” 120. The free region 120 and the fixed region 110 may be formed from, comprise, consist essentially of, or consist of ferromagnetic materials, such as Co, Fe, Ni or their alloys, NiFe, CoFe, CoNiFe, or doped alloys CoX, CoFeX, CoNiFeX (X=B, Cu, Re, Ru, Rh, Hf, Pd, Pt, C), or other half-metallic ferromagnetic materials, such as, for example, NiMnSb and PtMnSb. In some embodiments, for example, the free region 120, the fixed region 110, or both may be formed, in whole or in part, from Co_(x)Fe_(y)B_(z), wherein x=10 to 80, y=10 to 80, and z=0 to 50. In other embodiments, the free region 120, the fixed region 110, or both may be formed, in whole or in part, of iron (Fe) and boron (B) and not include cobalt (Co). The compositions and structures (e.g., the thicknesses and other physical dimensions) of the free region 120 and the fixed region 110 may be the same or different.

Alternatively or additionally, in some embodiments, the free region 120, the fixed region 110, or both, may be formed from or comprise a plurality of materials, some of which may be magnetic materials and some of which may be nonmagnetic materials. For example, some such multi-material free regions, fixed regions, or both, may include multiple sub-regions. For example, and without limitation, the free region 120, the fixed region 110, or both, may be formed from or comprise repeating sub-regions of cobalt and platinum, wherein a sub-region of platinum may be disposed between sub-regions of cobalt. As another example, without limitation, the free region 120, the fixed region 110, or both, may comprise repeating sub-regions of cobalt and nickel, wherein a sub-region of nickel may be disposed between sub-regions of cobalt. Thus, either or both of the fixed region 110 and the free region 120 may be formed homogeneously or, optionally, may be formed to include more than one sub-region of magnetic material and, optionally, nonmagnetic material (e.g., coupler material).

In some embodiments, both the fixed region 110 and the free region 120 may be formed, in whole or in part, from the same material, e.g., a CoFeB material. However, in some such embodiments, the relative atomic ratios of Co:Fe:B may be different in the fixed region 110 and the free region 120. One or both of the fixed region 110 and the free region 120 may include sub-regions of magnetic material that include the same elements as one another, but with different relative atomic ratios of the elements therein. For example, and without limitation, a sub-region of the free region 120 may have a lower concentration of boron (B) compared to CoFe than another sub-region of the free region 120.

In some embodiments, the memory cells of embodiments of the present disclosure may be configured as out-of-plane STT-MRAM cells. “Out-of-plane” STT-MRAM cells, include magnetic regions exhibiting a magnetic orientation that is predominantly oriented in a vertical direction. For example, as illustrated in FIG. 1A, which is a view of box AB of FIG. 1, the STT-MRAM cell may be configured to exhibit a vertical magnetic orientation in at least one of the magnetic regions (e.g., the fixed region 110 and the free region 120). The vertical magnetic orientation exhibited may be characterized by perpendicular magnetic anisotropy (“PMA”) strength. As illustrated in FIG. 1A by arrows 112 _(A) and double-pointed arrows 122 _(A), in some embodiments, each of the fixed region 110 and the free region 120 may exhibit a vertical magnetic orientation. The magnetic orientation of the fixed region 110 may remain directed in essentially the same direction throughout operation of the STT-MRAM cell, for example, in the direction indicated by arrows 112 _(A) of FIG. 1A. The magnetic orientation of the free region 120, on the other hand, may be switched, during operation of the cell, between a parallel configuration and an anti-parallel configuration, as indicated by double-pointed arrows 122 _(A) of FIG. 1A.

In other embodiments, the memory cells of embodiments of the present disclosure may be configured as in-plane STT-MRAM cells. “In-plane” STT-MRAM cells include magnetic regions exhibiting a magnetic origination that is predominantly oriented in a horizontal direction. For example, as illustrated in FIG. 1B, which is a view of box AB of FIG. 1, the STT-MRAM cell may be configure to exhibit a horizontal magnetic orientation in at least one of the magnetic regions (e.g., the fixed region 110 and the free region 120). The horizontal orientation exhibited may be characterized by horizontal magnetic anisotropy (“HMA”) strength. As illustrated in FIG. 1B by arrows 112 _(B) and double-pointed arrows 122 _(B), in some embodiments, each of the fixed region 110 and the free region 120 may exhibit a horizontal magnetic orientation. The magnetic orientation of the fixed region 110 may remain directed in essentially the same direction throughout operation of the STT-MRAM cell, for example, in the direction indicated by arrows 112 _(B) of FIG. 1B. The magnetic orientation of the free region 120, on the other hand, may be switched, during operation of the cell, between a parallel configuration and an anti-parallel configuration, as indicated by double-pointed arrows 122 _(B) of FIG. 1B.

With continued reference to FIG. 1, an intermediate oxide region 130 may be disposed between the free region 120 and the fixed region 110. The intermediate oxide region 130 may be configured as a tunnel region and may contact the fixed region 110 along interface 131 and may contact the free region 120 along interface 132. The intermediate oxide region 130 may be formed from, comprise, consist essentially of, or consist of a nonmagnetic oxide material, e.g., magnesium oxide (MgO), aluminum oxide (Al₂O₃), titanium oxide (TiO₂), or other oxide materials of conventional tunnel barrier regions. One or more nonmagnetic oxide materials may be included. In some embodiments, additional non-oxide materials may be included. The intermediate oxide region 130 may, thus, be formed as a homogeneous region or as a region with a heterogeneous mixture or distinctive sub-regions of one or more materials.

One or more lower intermediary regions 140 may, optionally, be disposed over the lower electrode 105 and under the fixed region 110 and the free region 120. The lower intermediary regions 140 may include foundation materials formulated and configured to provide a smooth template upon which overlying materials are formed and to enable formation of overlying materials at desired crystalline structures. The lower intermediary regions 140 may alternatively or additionally include material configured to inhibit diffusion, during operation of the memory cell, between the lower electrode 105 and material overlying the lower intermediary regions 140. For example, and without limitation, the lower intermediary regions 140 may be formed from, comprise, consist essentially of, or consist of a material comprising at least one of cobalt (Co) and iron (Fe) (e.g., a CoFeB material); a nonmagnetic material (e.g., a metal (e.g., tantalum (Ta), titanium (Ti), ruthenium (Ru), tungsten (W)), a metal nitride (e.g., tantalum nitride (TaN), titanium nitride (TiN)), a metal alloy); or any combination thereof. In some embodiments, the lower intermediary regions 140, if included, may be incorporated with the lower electrode 105. For example, the lower intermediary regions 140 may include or consist of an upper-most sub-region of the lower electrode 105.

One or more upper intermediary regions 150 may, optionally, be disposed over the magnetic regions (e.g., the fixed region 110 and the free region 120) of the magnetic cell core 101. The upper intermediary regions 150, if included, may be configured to ensure a desired crystal structure in neighboring materials, to aid in patterning processes during fabrication of the magnetic cell, or to function as a diffusion barrier. In some embodiments, the upper intermediary regions 150, if present, may be formed from, comprise, consist essentially of, or consist of a conductive material (e.g., one or more materials such as copper (Cu), tantalum (Ta), titanium (Ti), tungsten (W), ruthenium (Ru), tantalum nitride (TaN), or titanium nitride Ta(N)). In some embodiments, the upper intermediary regions 150, if included, may be incorporated with the upper electrode 104. For example, the upper intermediary regions 150 may include or consist of a lower-most sub-region of the upper electrode 104.

The magnetic cell core 101 also includes a secondary oxide region 170 adjacent to the free region 120. The secondary oxide region 170 may be formed over the lower electrode 105 and, if present, the lower intermediary regions 140. The secondary oxide region 170 may be formed from, comprise, consist essentially of, or consist of, for example and without limitation, a nonmagnetic oxide material (e.g., magnesium oxide (MgO), aluminum oxide (Al₂O₃), titanium oxide (TiO₂), or other oxide materials of conventional tunnel barrier regions). In some embodiments, the secondary oxide region 170 may be formed from the same material from which the intermediate oxide region 130 is formed, though the relative atomic ratios of the elements of such material may be different in the secondary oxide region 170 and the intermediate oxide region 130. For example, both the secondary oxide region 170 and the intermediate oxide region 130 may be formed from MgO. However, as discussed below, the secondary oxide region 170 may have a lower oxygen concentration than the intermediate oxide region 130.

A getter region 180 is formed proximate to the secondary oxide region 170. In some embodiments, as illustrated in FIG. 1, the getter region 180 may be adjacent (e.g., directly below) the secondary oxide region 170. Thus, while the secondary oxide region 170 may be adjacent to the free region 120 along an upper surface, e.g., at interface 172, the secondary oxide region 170 may be adjacent to the getter region 180 along an opposite, lower surface, e.g., at interface 178.

The getter region 180 is formulated and configured to remove oxygen from the secondary oxide region 170 so as to lower the oxygen concentration in, and thus the electrical resistance of, the secondary oxide region 170, which maximizes the magnetoresistance of the magnetic cell core 101. For example, the getter region 180 may be formed from, comprise, consist essentially of, or consist of a material having a chemical affinity for oxygen that is about equal to or greater than the chemical affinity for oxygen of the material of the secondary oxide region 170, such that the material of the getter region 180 (referred to herein as the “getter material”) is formulated to compete for the oxygen of the secondary oxide region 170. In embodiments in which the getter material includes a metal, the metal-oxide heat of formation is an indication of the chemical affinity of the getter material for oxygen. Therefore, the getter material of the getter region 180 may have a metal-oxide heat of formation that is about the same as (e.g., not greater than about 10% higher than) or less than the heat of formation of the oxide of the secondary oxide region 170.

For example, and without limitation, in embodiments in which the secondary oxide region 170 is formed of magnesium oxide (MgO), which has a metal-oxide heat of formation of about −6.29 (eV), the getter material of the getter region 180 may be formed from, comprise, consist essentially of, or consist of a metal having a metal-oxide heat of formation of equal to or less than about −5.66 (eV), e.g., calcium (Ca), strontium (Sr), aluminum (Al), barium (Ba), zirconium (Zr), compounds thereof, or combinations thereof. Calcium oxide (CaO) has a metal-oxide heat of formation of about −6.58 (eV) (i.e., less than the heat of formation of MgO). Strontium oxide (SrO) has a metal-oxide heat of formation of about −6.13 (eV) (i.e., only about 2.5% higher than the heat of formation of MgO). Aluminum oxide (Al₂O₃) has a metal-oxide heat of formation of about −5.79 (eV) (i.e., only about 7.9% higher than the heat of formation of MgO). Barium oxide (BaO) and zirconium oxide (ZrO₂) have metal-oxide heats of formation of about −5.68 (eV) (i.e., only about 9.7% higher than the heat of formation of MgO). Thus, the getter material of the getter region 180 may be selected to compete for oxygen with the material of the secondary oxide region 170.

The getter region 180 may be formed as a homogeneous region of a pure, elemental metal having the desired chemical affinity (e.g., metal-oxide heat of formation) for oxygen or of a compound of such metal. For example, in embodiments in which the secondary oxide region 170 is formed of magnesium oxide (MgO), the getter region 180 may be formed from pure calcium (Ca) or from a calcium compound (e.g., calcium carbonate (CaCO₃)). In other embodiments, the getter region 180 may include the getter material (e.g., the metal) embedded in a carrier material, e.g., magnesium oxide (MgO), titanium oxide (TiO). However, it is contemplated that the getter region 180 may be formulated and configured to provide sufficient free (i.e., available for chemical reaction and/or bonding with oxygen) metal atoms to accomplish attraction and removal of oxygen from the secondary oxide region 170 to effect a reduction in the oxygen concentration of and the electrical resistance of the secondary oxide region 170. For example, the getter region 180 may be formulated to include a concentration of free metal and may be configured to have an amount (e.g., thickness) that enables removal of a desired amount of oxygen from the secondary oxide region 170. In embodiments in which the concentration of free metal in the getter material is low, the getter region 180 may be formed to be thick; whereas, in embodiments in which the concentration of free metal in the getter material is high, the getter region 180 may be formed to be thin to accomplish the same removal of oxygen from the secondary oxide region 170.

The removal of oxygen from the secondary oxide region 170 by the getter region 180 may be initiated by annealing the materials of the magnetic cell core 101 during fabrication thereof. In such embodiments, the temperature and time of the anneal, which may be carried out in one or more stages, may be tailored to achieve a desired transfer of oxygen from the secondary oxide region 170 to the getter region 180. Higher anneal temperatures and longer anneal times may promote more oxygen removal compared to lower anneal temperatures and shorter anneal times. It is contemplated that the transfer of oxygen from the secondary oxide region 170 to the getter region 180 be substantially permanent, such that, once transferred, oxygen may not diffuse back to the secondary oxide region 170.

At least in embodiments in which the intermediate oxide region 130 and the secondary oxide region 170 are formed from the same oxide material (e.g., MgO), the resulting magnetic cell core 101, after transfer of oxygen between the secondary oxide region 170 and the getter region 180, includes the secondary oxide region 170 that has a lower concentration of oxygen compared to the intermediate oxide region 130. In this or other embodiments, the secondary oxide region 170 has a lower electric resistance compared to the intermediate oxide region 130. For example, and without limitation, the secondary oxide region 170 may have an electrical resistance that is less than about 50% (e.g., between about 1% and about 20%) of the electrical resistance of the intermediate oxide region 130. In some embodiments, the secondary oxide region 170 may be electrically conductive as a result of the oxygen removal. Thus, as described herein, the secondary oxide region 170 may be electrically resistive, though less so than the intermediate oxide region 130, or may be electrically conductive, both alternatives encompassed by the description of “lower electrical resistance,” as used herein. Thus, the secondary oxide region 170 does not degrade (e.g., substantially decrease) the magnetoresistance of the cell.

Not all of the oxygen in the secondary oxide region 170 may be removed by the getter region 180. Rather, the getter region 180 may be formulated and configured to remove only a portion of the oxygen, to leave a minimal oxygen concentration in the secondary oxide region 170. It is contemplated that the minimal oxygen concentration is a concentration sufficient to enable the secondary oxide region 170 to continue to induce surface/interface MA with the free region 120. In some embodiments, the resulting, lowered oxygen concentration in the secondary oxide region 170 may be consistent throughout the secondary oxide region 170. In other embodiments, the secondary oxide region 170 may have a gradient of oxygen, after the transfer of oxygen from the secondary oxide region 170 to the getter region 180. Such oxygen gradient may include a greater concentration proximate to the interface 172 with the free region 120 and a lesser oxygen concentration proximate to the interface 178 with the getter region 180. In such embodiments, the oxygen concentration may subsequently equilibrate to a substantially-consistent oxygen concentration throughout the secondary oxide region 170.

It is contemplated that the getter region 180 be physically isolated from the intermediate oxide region 130 to inhibit the getter region 180 from removing oxygen from and lowering the oxygen concentration of the intermediate oxide region 130. Therefore, as illustrated in FIG. 1, the getter region 180 may be spaced from the intermediate oxide region 130 by other regions of the magnetic cell core 101, including, for example and without limitation, the secondary oxide region 170 and the free region 120. In such embodiments, the getter region 180 may not chemically interact with the intermediate oxide region 130.

In one embodiment of the present disclosure, the magnetic cell structure 100 includes the getter region 180 formed of calcium (Ca) or a calcium compound (e.g., CaCO₃), the secondary oxide region 170 formed of magnesium oxide (MgO), the free region 120 formed of a CoFeB material, the intermediate oxide region 130 formed of MgO, and the fixed region 110 formed at least partially of a CoFeB material. Due to the lower heat of formation of CaO (i.e., −6.58 (eV)) compared to the heat of formation of MgO (i.e., −6.28 (eV)), oxygen from the secondary oxide region 170 transfers to the getter region 180. Thus, the getter region 180 includes Ca and oxygen, which oxygen is derived from the secondary oxide region 170. Moreover, though both the secondary oxide region 170 and the intermediate oxide region 130, of this embodiment, are formed from the same material, MgO, the secondary oxide region 170 of the resulting magnetic cell core 101 has a lower concentration of oxygen and a lower electrical resistance than the intermediate oxide region 130. The secondary oxide region 170 may have an electrical resistance that is less than about 20% that of the intermediate oxide region 130.

Though, in FIG. 1, the getter region 180 is directly adjacent and below the secondary oxide region 170, in other embodiments, such as that of FIG. 2, the getter region 180 may be proximate to the secondary oxide region 170 by being located internal to a secondary oxide region 270. For example, the getter region 180 may be a central sub-region of the secondary oxide region 270, with an upper oxide sub-region 276 over the getter region 180 and a lower oxide sub-region 278 under the getter region 180. The upper oxide sub-region 276 may be adjacent to the free region 120 along interface 272, and the lower oxide sub-region 278 may be adjacent to the lower electrode 105 or, if present, the lower intermediary regions 140 along interface 274.

In other embodiments, the getter region 180 may not be a distinctive region proximate to (e.g., adjacent to or internal to) the secondary oxide region 170 (FIG. 1), but may be a region of the getter material embedded within a material neighboring the secondary oxide region 170. In any respect, the getter material is proximate to the secondary oxide region 170 and is configured and formulated to remove oxygen from the secondary oxide region 170 to lower the oxygen concentration and the electrical resistance of the secondary oxide region 170.

Accordingly, disclosed is a memory cell comprising a magnetic cell core. The magnetic cell core comprises a magnetic region exhibiting a switchable magnetic orientation. Another magnetic region exhibits a fixed magnetic orientation. An intermediate oxide region is disposed between the magnetic region and the another magnetic region. Another oxide region is spaced from the intermediate oxide region by the magnetic region. The another oxide region has a lower electrical resistance than the intermediate oxide region. A getter region is proximate to the another oxide region and comprises oxygen and a metal.

Forming memory cells of the present disclosure may include sequentially forming the material or materials of each region from bottom to top. Therefore, for example, to form the magnetic cell structure 100 of FIG. 1, the conductive material of the lower electrode may be formed over the substrate 102. Then, the materials of the lower intermediary regions 140, if included, may be formed over the conductive material. Then, the getter material of the getter region 180 may be formed (e.g., by sputtering, CVD, PVD, ALD, or other known deposition technique). The oxide material of the secondary oxide region 170 may be formed over the getter material, and the magnetic material of the free region 120 may be formed over the oxide material. The oxide material of the intermediate oxide region 130 may then be formed over the magnetic material of the free region 120. The magnetic material of the fixed region 110 may be formed over the oxide material of the intermediate oxide region 130. The material of the upper intermediary regions 150, if included, may be formed thereover. Finally, the conductive material of the upper electrode 104 may be formed. The materials may then be patterned, in one or more stages, to form the structure of the magnetic cell core 101. Techniques for patterning structures, such as precursor structures of the materials described to form structures such as the magnetic cell structure 100 of FIG. 1, are known in the art and so are not described in detail.

A magnetic cell structure 200 of FIG. 2 may be similarly formed, with the exception that formation of the oxide material of the secondary oxide region 270 may be formed in multiple stages to form the getter region 180 between the lower oxide sub-region 278 and the upper oxide sub-region 276.

At least after formation of the getter material of the getter region 180 and the oxide material of the secondary oxide region (e.g., the secondary oxide region 170 of FIG. 1, the secondary oxide region 270 of FIG. 2), oxygen may be transferred (e.g., during an anneal) between the secondary oxide region (e.g., 170 of FIG. 1, 270 of FIG. 2) and the getter region 180. With reference to FIG. 3, illustrated is a partial cell core structure 300 in which an oxide material 370, comprising oxygen 371, is proximate to a getter material 380. FIG. 3 may represent the state of the oxide material 370 and the getter material 380 at initial formation of the materials. After time and, in some embodiments, after anneal, at least some of the oxygen 371 diffuses from the oxide material 370 to the getter material 380, forming, as illustrated in FIG. 4, a partial cell core structure 400 having oxide material 470, depleted in oxygen, and getter material 480, enriched in oxygen. At least in some embodiments, some of the oxygen 371 remains in the depleted oxide material 470 such that the depleted oxide material 470, remains formulated and configured to induce MA with the free region 120. The electrical resistance of the depleted oxide material 470 (FIG. 4) is lower than the electrical resistance of the oxide material 370 (FIG. 3).

One or more anneal stages may be carried out during or after formation of the materials of the magnetic cell core 101. In some embodiments, the anneal may be carried out after patterning.

Though in the embodiments of FIGS. 1 and 2, the free region 120 is illustrated as being closer to the substrate 102 than the fixed region 110, in other embodiments, the fixed region 110 may be closer to the substrate 102. For example, with reference to FIG. 5, a magnetic cell structure 500, according to another embodiment of the present disclosure, may alternatively include a magnetic cell core 501 that comprises, from bottom (proximate to the substrate 102, the lower electrode 105, and, if included, the lower intermediary regions 140) to top (proximate to the upper electrode 104 and, if included, the upper intermediary regions 150) the fixed region 110, the intermediate oxide region 130, the free region 120, and the secondary oxide region 170. The getter region 180 may be proximate to the secondary oxide region 170, for example, adjacent and over the secondary oxide region 170 (as in FIG. 5), or internal to the secondary oxide region 170 (as in FIG. secondary oxide region 270 of FIG. 2).

At least after formation of the secondary oxide region 170 and the getter region 180, oxygen may be transferred from the secondary oxide region 170 to the getter region 180 to lower the oxygen concentration and the electrical resistance of the secondary oxide region 170. In the embodiment of FIG. 5, the oxygen is transferred upward.

Accordingly, disclosed is a method of forming a magnetic memory cell. The method comprises forming a free region between an intermediate oxide region and another oxide region. A getter material is formed proximate to the another oxide region. Oxygen is transferred from the another oxide region to the getter material to decrease an electrical resistance of the another oxide region.

In some embodiments, the secondary oxide region 170 and the getter region 180 may not be in direct contact. For example, as illustrated in FIG. 6, a partial cell core structure 600 may include an intermediate region 660 between the secondary oxide region 170 and the getter region 180, such that the secondary oxide region 170 contacts the intermediate region 660 along interface 676. The intermediate region 660 may be formulated to permit diffusion of oxygen from the secondary oxide region 170 to the getter region 180. Therefore, even with the secondary oxide region 170 proximate to, but not directly adjacent to, the getter region 180, the proximity of the getter region 180 to the secondary oxide region 170 may enable the reduction of the oxygen concentration and the electrical resistance of the secondary oxide region 170.

With reference to FIGS. 7 and 8, in some embodiments, the getter material of a partial cell core structure 700 may be proximate to the secondary oxide region 170 by being laterally adjacent thereto. Thus, a getter region 780 may laterally surround the secondary oxide region 170 and may remove oxygen from and reduce the electrical resistance of the secondary oxide region 170.

With reference to FIG. 9, illustrated is an STT-MRAM system 900 that includes peripheral devices 912 in operable communication with an STT-MRAM cell 914, a grouping of which may be fabricated to form an array of memory cells in a grid pattern including a number of rows and columns, or in various other arrangements, depending on the system requirements and fabrication technology. The STT-MRAM cell 914 includes a magnetic cell core 902, an access transistor 903, a conductive material that may function as a data/sense line 904 (e.g., a bit line), a conductive material that may function as an access line 905 (e.g., a word line), and a conductive material that may function as a source line 906. The peripheral devices 912 of the STT-MRAM system 900 may include read/write circuitry 907, a bit line reference 908, and a sense amplifier 909. The cell core 902 may be any one of the magnetic cell cores (e.g., the magnetic cell core 101 (FIG. 1), the magnetic cell core 201 (FIG. 2), the magnetic cell core 501 (FIG. 5)) described above. Due to the structure of the cell core 902, the method of fabrication, or both, the STT-MRAM cell 914 may include a free region 120 (FIG. 1) between two MA-inducing, oxide regions (e.g., the intermediate oxide region 130 (FIG. 1) and the secondary oxide region 170 (FIG. 1)) with the electrical resistance contribution from the secondary oxide region 170 being less than about 50% of that of the intermediate oxide region 130. Therefore, the STT-MRAM cell 914 may have high MA strength, high magnetoresistance, a low RA product, and low programming voltage.

In use and operation, when an STT-MRAM cell 914 is selected to be programmed, a programming current is applied to the STT-MRAM cell 914, and the current is spin-polarized by the fixed region of the cell core 902 and exerts a torque on the free region of the cell core 902, which switches the magnetization of the free region to “write to” or “program” the STT-MRAM cell 914. In a read operation of the STT-MRAM cell 914, a current is used to detect the resistance state of the cell core 902.

To initiate programming of the STT-MRAM cell 914, the read/write circuitry 907 may generate a write current (i.e., a programming current) to the data/sense line 904 and the source line 906. The polarity of the programming voltage between the data/sense line 904 and the source line 906 determines the switch in magnetic orientation of the free region in the cell core 902. By changing the magnetic orientation of the free region with the spin polarity, the free region is magnetized according to the spin polarity of the programming current, and the programmed logic state is written to the STT-MRAM cell 914.

To read the STT-MRAM cell 914, the read/write circuitry 907 generates a read voltage to the data/sense line 904 and the source line 906 through the cell core 902 and the access transistor 903. The programmed state of the STT-MRAM cell 914 relates to the electrical resistance across the cell core 902, which may be determined by the voltage difference between the data/sense line 904 and the source line 906. Thus, the lower electrical resistance of the STT-MRAM cell 914, due to the lowered electrical resistance of the secondary oxide region 170 (FIG. 1) due to the getter region 180 (FIG. 1), enables use of a lower programming voltage. The STT-MRAM cell 914 may have a higher effective magnetoresistance, due to the getter region 180 (FIG. 1), which may further enhance performance of the STT-MRAM cell 914. In some embodiments, the voltage difference may be compared to the bit line reference 908 and amplified by the sense amplifier 909.

FIG. 9 illustrates one example of an operable STT-MRAM system 900. It is contemplated, however, that the magnetic cell cores (e.g., the magnetic cell core 101 (FIG. 1), the magnetic cell core 201 (FIG. 2), the magnetic cell core 501 (FIG. 5)) may be incorporated and utilized within any STT-MRAM system configured to incorporate a magnetic cell core having magnetic regions.

Accordingly, disclosed is a spin torque transfer magnetic random access memory (STT-MRAM) system comprising STT-MRAM cells. At least one STT-MRAM cell of the STT-MRAM cells comprises a pair of magnetic regions and a pair of oxide regions. The pair of magnetic regions comprises a magnetic region, exhibiting a switchable magnetic orientation, and another magnetic region, exhibiting a fixed magnetic orientation. The pair of oxide regions comprises an intermediate oxide region and another oxide region. The intermediate oxide region is between the magnetic region and the another magnetic region. The another oxide region is adjacent a surface of the magnetic region opposite an interface between the intermediate oxide region and the magnetic region. The another oxide region has a lower electrical resistance than the intermediate oxide region. The at least one STT-MRAM cell also comprises a getter region proximate to the another oxide region. The getter region comprises a metal and oxygen. At least one peripheral device is in operable communication with the at least one STT-MRAM cell. At least one of an access transistor, a bit line, a word line, and a source line are in operable communication with the magnetic cell core.

With reference to FIG. 10, illustrated is a simplified block diagram of a semiconductor device 1000 implemented according to one or more embodiments described herein. The semiconductor device 1000 includes a memory array 1002 and a control logic component 1004. The memory array 1002 may include a plurality of the STT-MRAM cells 914 (FIG. 9) including any of the magnetic cell cores (e.g., the magnetic cell core 101 (FIG. 1), the magnetic cell core 201 (FIG. 2), the magnetic cell core 501 (FIG. 5)) discussed above, which magnetic cell cores (e.g., the magnetic cell core 101 (FIG. 1), the magnetic cell core 201 (FIG. 2), the magnetic cell core 501 (FIG. 5)) may have been formed according to a method described above and may be operated according to a method described above. The control logic component 1004 may be configured to operatively interact with the memory array 1002 so as to read from or write to any or all memory cells (e.g., STT-MRAM cell 914 (FIG. 9)) within the memory array 1002.

Accordingly, disclosed is a semiconductor device comprising a spin torque transfer magnetic random access memory (STT-MRAM) array comprising STT-MRAM cells. At least one STT-MRAM cell of the STT-MRAM cells comprises an intermediate oxide region between a free region and a fixed region. Another oxide region is adjacent to the free region and is spaced from the intermediate oxide region. The another oxide region has a lower electrical resistance than the intermediate oxide region. A getter region is proximate the another oxide region and comprises a metal having a metal-oxide heat of formation that is less than 10% greater than a heat of formation of an oxide of the another oxide region.

With reference to FIG. 11, depicted is a processor-based system 1100. The processor-based system 1100 may include various electronic devices manufactured in accordance with embodiments of the present disclosure. The processor-based system 1100 may be any of a variety of types such as a computer, pager, cellular phone, personal organizer, control circuit, or other electronic device. The processor-based system 1100 may include one or more processors 1102, such as a microprocessor, to control the processing of system functions and requests in the processor-based system 1100. The processor 1102 and other subcomponents of the processor-based system 1100 may include magnetic memory devices manufactured in accordance with embodiments of the present disclosure.

The processor-based system 1100 may include a power supply 1104 in operable communication with the processor 1102. For example, if the processor-based system 1100 is a portable system, the power supply 1104 may include one or more of a fuel cell, a power scavenging device, permanent batteries, replaceable batteries, and rechargeable batteries. The power supply 1104 may also include an AC adapter; therefore, the processor-based system 1100 may be plugged into a wall outlet, for example. The power supply 1104 may also include a DC adapter such that the processor-based system 1100 may be plugged into a vehicle cigarette lighter or a vehicle power port, for example.

Various other devices may be coupled to the processor 1102 depending on the functions that the processor-based system 1100 performs. For example, a user interface 1106 may be coupled to the processor 1102. The user interface 1106 may include input devices such as buttons, switches, a keyboard, a light pen, a mouse, a digitizer and stylus, a touch screen, a voice recognition system, a microphone, or a combination thereof. A display 1108 may also be coupled to the processor 1102. The display 1108 may include an LCD display, an SED display, a CRT display, a DLP display, a plasma display, an OLED display, an LED display, a three-dimensional projection, an audio display, or a combination thereof. Furthermore, an RF sub-system/baseband processor 1110 may also be coupled to the processor 1102. The RF sub-system/baseband processor 1110 may include an antenna that is coupled to an RF receiver and to an RF transmitter (not shown). A communication port 1112, or more than one communication port 1112, may also be coupled to the processor 1102. The communication port 1112 may be adapted to be coupled to one or more peripheral devices 1114, such as a modem, a printer, a computer, a scanner, or a camera, or to a network, such as a local area network, remote area network, intranet, or the Internet, for example.

The processor 1102 may control the processor-based system 1100 by implementing software programs stored in the memory. The software programs may include an operating system, database software, drafting software, word processing software, media editing software, or media playing software, for example. The memory is operably coupled to the processor 1102 to store and facilitate execution of various programs. For example, the processor 1102 may be coupled to system memory 1116, which may include one or more of spin torque transfer magnetic random access memory (STT-MRAM), magnetic random access memory (MRAM), dynamic random access memory (DRAM), static random access memory (SRAM), racetrack memory, and other known memory types. The system memory 1116 may include volatile memory, non-volatile memory, or a combination thereof. The system memory 1116 is typically large so that it can store dynamically loaded applications and data. In some embodiments, the system memory 1116 may include semiconductor devices, such as the semiconductor device 1000 of FIG. 10, memory cells including any of the magnetic cell cores (e.g., the magnetic cell core 101 (FIG. 1), the magnetic cell core 201 (FIG. 2), the magnetic cell core 501 (FIG. 5)) discussed above, or a combination thereof.

The processor 1102 may also be coupled to non-volatile memory 1118, which is not to suggest that system memory 1116 is necessarily volatile. The non-volatile memory 1118 may include one or more of STT-MRAM, MRAM, read-only memory (ROM) such as an EPROM, resistive read-only memory (RROM), and flash memory to be used in conjunction with the system memory 1116. The size of the non-volatile memory 1118 is typically selected to be just large enough to store any necessary operating system, application programs, and fixed data. Additionally, the non-volatile memory 1118 may include a high capacity memory such as disk drive memory, such as a hybrid-drive including resistive memory or other types of non-volatile solid-state memory, for example. The non-volatile memory 1118 may include semiconductor devices, such as the semiconductor device 1000 of FIG. 10, memory cells including any of the magnetic cell cores (e.g., the magnetic cell core 101 (FIG. 1), the magnetic cell core 201 (FIG. 2), the magnetic cell core 501 (FIG. 5)) discussed above, or a combination thereof.

Accordingly, disclosed is an electronic system comprising at least one processor. The at least one processor comprises at least one magnetic memory cell. The at least one magnetic memory cell comprises a fixed region exhibiting a fixed magnetic orientation, an intermediate oxide region adjacent to the fixed region, and a free region adjacent to the intermediate oxide region. The free region exhibits a switchable magnetic orientation. Another oxide region is adjacent to the free region, and a getter material is proximate to the another oxide region. The getter material comprises a metal and oxygen. A metal oxide of the metal has a heat of formation that is less than about 10% greater than a heat of formation of an oxide of the another oxide region. A power supply is in operable communication with the at least one processor.

While the present disclosure is susceptible to various modifications and alternative forms in implementation thereof, specific embodiments have been shown by way of example in the drawings and have been described in detail herein. However, the present disclosure is not intended to be limited to the particular forms disclosed. Rather, the present disclosure encompasses all modifications, combinations, equivalents, variations, and alternatives falling within the scope of the present disclosure as defined by the following appended claims and their legal equivalents. 

1. A method of forming a magnetic memory cell, comprising: forming a free region directly between an intermediate oxide region and another oxide region; forming a getter material proximate to the another oxide region; and transferring oxygen from the another oxide region to the getter material to decrease an electrical resistance of the another oxide region.
 2. The method of claim 1, wherein forming a free region and forming a getter material comprise: forming a getter material over a substrate; forming the another oxide region over the getter material; forming the free region over the another oxide region; and forming the intermediate oxide region over the free region.
 3. The method of claim 1, wherein forming a getter material proximate to the another oxide region comprises: forming a lower oxide sub-region of the another oxide region; forming the getter material over the lower oxide sub-region; and forming an upper oxide sub-region of the another oxide region over the getter material.
 4. The method of claim 1, wherein forming a free region and forming a getter material comprise: forming the intermediate oxide region over a substrate; forming the free region over the intermediate oxide region; forming the another oxide region over the free region; and forming the getter material over the another oxide region.
 5. The method of claim 1, wherein transferring oxygen from the another oxide region to the getter material comprises annealing the another oxide region and the getter material.
 6. The method of claim 1, wherein transferring oxygen from the another oxide region to the getter material comprises transferring a portion of the oxygen from the another oxide region to the getter material.
 7. The method of claim 1, further comprising forming a fixed region adjacent to the intermediate oxide region.
 8. The method of claim 1, wherein forming a getter material proximate the another oxide region comprises sputtering a metal.
 9. The method of claim 1, further comprising selecting the getter material to have a metal-oxide heat of formation that is no greater than about 10% higher than a heat of formation of an oxide of the another oxide region.
 10. A method of forming a magnetic memory cell, comprising: forming a getter material over a lower electrode; forming a base oxide region over the lower electrode and proximate the getter material; forming a free region over the base oxide region; forming an intermediate oxide region over the free region; and annealing the getter material and the base oxide region to transfer oxygen from the base oxide region to the getter material.
 11. The method of claim 10, further comprising forming an intermediate region between the getter material and the base oxide region.
 12. The method of claim 10, wherein forming a getter material and forming a base oxide region comprise: forming a lower oxide sub-region over the lower electrode; forming the getter material over the lower oxide sub-region; and forming an upper oxide sub-region over the getter region, the base oxide region comprising the lower oxide sub-region and the upper oxide sub-region.
 13. A method of forming a semiconductor device, comprising: forming an array of magnetic memory cells, forming at least one magnetic memory cell of the array comprising: forming an oxide material; forming a magnetic material over the oxide material, the magnetic material exhibiting a switchable vertical magnetic orientation; forming another oxide material over the magnetic material; forming a getter material directly adjacent one of the oxide material and the another oxide material; and transferring, to the getter material, oxygen from the one of the oxide material and the another oxide material.
 14. The method of claim 13, further comprising, after the transferring, patterning the oxide material, the magnetic material, the another oxide material, and the getter material to form a cell core of the at least one magnetic memory cell.
 15. The method of claim 13, further comprising, before the transferring, patterning the oxide material, the magnetic material, the another oxide material, and the getter material to form a cell core of the at least one magnetic memory cell.
 16. The method of claim 13, wherein: forming an oxide material comprises forming magnesium oxide; and forming another oxide material comprises forming an additional amount of the magnesium oxide.
 17. The method of claim 16, wherein forming a getter material comprises forming a getter material comprising at least one of calcium, strontium, aluminum, barium, or zirconium.
 18. The method of claim 16, wherein forming a getter material comprises forming calcium or a calcium compound.
 19. The method of claim 18, wherein forming a magnetic material comprises forming a CoFeB material.
 20. The method of claim 13, wherein forming a getter material directly adjacent one of the oxide material and the another oxide material comprises forming the getter material above both the oxide material and the another oxide material. 